SysTick (System Timer)
The Cortex-M3 has a flexible system timer, which is separate from the microcontroller’s peripheral functions.This is a 24-bit automatic reload-down counter. It is possible to generate periodic exceptions (refere to the 13th time) because of the count end interrupt function. /262/#anchor4″>Refer to the 13th).As with other exception handling, the priority can be set.
The SysTick clock can be selected from two sources.One is the CPU clock. The other is called an external reference clock, and it depends on each microcontroller.Some microcomputers cannot select an external reference clock, so please refer to the instruction manual of each microcomputer.In many cases, the external reference clock can be a clock divided by the CPU clock (e.g., 8 divisions).This timer is the perfect timer for time management, like a real-time OS or task scheduling.
Features of SysTick
SysTick Control and Status Register
To enable the SysTick feature, use the SysTick control and status registers.When the ENABLE bit of this register is set to 1, the counter begins to operate.In other words, the counter is loaded with a reload value and then the countdown starts.When the count value reaches 0, the COUNTFLAG bit of this register is set to 1.
You can also hold the SysTick handler based on the TICKINT bit.It then loads the reload value again and starts counting.The counter stops when the ENABLE bit is set to 0. To select the clock source, set the CLKSOURCE bit.When 0, the external reference clock is selected, and when 1, the CPU clock is selected.
SysTick Reload Value Register
Set the reload value of the counter to this register. When the counter reaches 0, the value of this register is set to the counter and the counting begins again.Any value between 0x00000001 and 0x00FFFF can be set.The starting value of 0 can be set to 0, but the SysTick interrupt and the COUNTFLAG bit are activated during a count from 1 to 0, so the starting value of 0 is invalid.Therefore, every N+1 clock pulse (where N is any value between 0x00000001 and 0x00FFFF) is active.
For example, if you need to generate a SysTick interrupt every 100 clock pulses, you need to write 99 to RELOAD.If a new value is written for each SysTick interrupt, it is treated as a single shot, so the actual countdown must be written.For example, if you need to generate a SysTick after 400 clock pulses, write 400 to RELOAD.
SysTick Current Value Register
To find out the current value of the register, use the SysTick current value register. You can get the current value of the register when it was accessed.This register is write-cleared, so writing any value clears the register to 0 and also clears the SysTick control and status register’s COUNTFLAG bit.
SysTick Calibration Value Register
The SysTick calibration value is stored as a fixed value in each microcontroller. Please refer to the instruction manual of the microcomputer because there is a microcomputer that this option cannot be used.For example, if the SysTick calibration value is fixed at 9000, a time base of 1ms is generated when the SysTick clock is 9MHz.
Generally speaking, microcomputer power management refers to optimizing the average power consumption of the entire microcomputer by using a low power mode.And the low power consumption mode specifically includes the following conditions.
- The entire microcomputer operates at a low frequency
- The CPU shuts down and only runs the peripheral functions
- It will shut down the CPU and the peripherals
- Gating the clock (controlling the clock at the gate to feed or stop it) to perform only the necessary functions
In this case, when the CPU stops, it must stop in the state with the lowest current consumption.In general, the internal state is set to stop the clock from being input to the CPU and prevent unnecessary current from flowing.The Cortex-M3 is prepared to do this. It even comes prepared with multiple low power modes.These modes are SLEEP and DEEP SLEEP.
Sleep is further divided into two types, SLEEP NOW and SLEEP on EXIT, depending on the timing of the transition.Deep Sleep is a deeper sleep mode than Sleep. Deeper means that it consumes less power than the former. However, it does take some time to get up.These power states are controlled by the system control registers. Let’s take a look at the details of each mode.
This mode is transitioned by a Wait For Interrupt (WFI) or Wait For Event (WFE) instruction. As soon as these instructions are executed in the program, the program goes into sleep mode. The word NOW is used to mean “soon”.
When transitioned by the Wait For Interrupt (WFI) instruction, the interrupt process (see Part 13) will be executed when the trigger to start from sleep occurs.If transitioned by Wait For Event (WFE), the interrupt is not executed after the trigger to wake up from sleep has occurred.Instead of jumping to the interrupt service routine, it will be executed from the next code that goes to sleep.
When these instructions are executed, the Nested Vector Interrupt Controller (NVIC (see Part 13) shifts the processor to a low-power state, pending other exceptions.
SLEEP on EXIT
When the SLEEPONEXIT bit of the system control register is set, immediately after exiting the lowest priority ISR, the Cortex-M3 automatically goes into sleep mode.The term “on EXIT” is used because the ISR goes into sleep mode “after it has finished”. It does not perform a context save (pop the register) and goes into sleep mode.Therefore, the next time an exception is handled, the exception is handled without PUSHing the register (which is not required).The user must set the SLEEPONEXIT bit before executing WFI/WFE in the main routine.
The Deep Sleep mode is used in conjunction with Sleep Now and Sleep on Exit.When the SLEEPDEEP bit of the system control register is set, the Cortex-M3 will go into a deeper sleep state. This is a sleep state for long periods of time.
Signal to indicate sleep state
The Cortex-M3 outputs the following signals to let you know when it’s time to sleep.
- This signal is asserted in Sleep Now or Sleep On Exit mode to indicate that the clock to the processor can be stopped.When a new interrupt is received, the NVIC releases the core from sleep and deasserts this signal.
- When the SLEEPDEEP bit of the system control register is set, this signal is asserted in the Sleep Now or Sleep on Exit mode.This signal is wired to the clock manager to gate the processor and system components, including the Phase Lock Loop (PLL), to save more power.When a new interrupt is received, the Nested Vector Interrupt Controller (NVIC) deasserts this signal and releases the core from sleep when it is notified by the clock manager that the clock is stable.
Power mode management similar to an 8-bit microcomputer
When it comes to applications that require power management, battery-powered ones are the first.It is developed in response to the challenge of how to reduce power consumption, extend battery life and reduce the need for users to change batteries.In these applications, power consumption is a higher priority than performance.Therefore, 8-bit microcomputers have been used in many cases for the reason that they consume less power.These days, 16-bit microcomputers are also being used, with slightly more advanced functionality.Therefore, various modes of low power consumption for 8-bit microcomputers have been considered by microcomputer companies and incorporated into the actual specifications.
The various low-power modes mentioned above were also conceived primarily in 8-bit microcomputers and have spread to 16-bit microcomputers.In 32-bit microcomputers, it is unlikely that the power is managed in such detail.However, one of the concepts of the Cortex-M3 is low power.As mentioned above, when you are in the mode to stop the Cortex-M3, you can choose between SLEEP NOW, SLEEP on EXIT, and DEEP SLEEP of the Cortex-M3.Therefore, it can be said that the Cortex-M3 has the same adaptive range as an 8-bit microcomputer even though it is a 32-bit microcomputer in terms of power management.
There are many microcomputers with Cortex-M3 in the world today. And each company’s microcomputers have a wide variety of low-power modes.When each microcontroller shifts to its own low-power mode, the microcontroller side decides which low-power mode the Cortex-M3 shifts to.Each microcontroller shifts to those low-power modes, and the Cortex-M3 is selected for either SLEEP NOW, SLEEP on EXIT, or DEEP SLEEP on the Cortex-M3.
For example, if you are in a low power mode where the CPU stops but the peripherals are running and the CPU must start running immediately due to peripherals or external triggers, then SLEEP NOW or SLEEP on EXIT will be applied for the Cortex-M3.For Cortex-M3, DEEP SLEEP is applied when the CPU and all peripheral functions are stopped and the entire microcontroller maintains a low power consumption mode for a long time.In this way, the microcontroller automatically selects (sets) the optimal low-power mode for the Cortex-M3, so users only need to understand the specification of the microcontroller’s low-power mode.
Please refer to the specifications of each microcomputer for the low power consumption mode of the microcomputer, and use the power management function of the Cortex-M3, which is equivalent to the 8-bit microcomputer.