processor mode

Overview of processor mode

All Arm processors (except the Cortex-M series), including the Cortex-A processor, have seven processor modes. When an exception is raised, the processor mode changes and some registers are automatically switched.

In FIQ mode, r8 to r14 are dedicated registers, and in the other modes, r13 and r14 are dedicated registers, and the contents of cpsr (see Part 4) are stored in the spsr (stored program status register) of each mode.

The stack pointer r13 is automatically switched when the processor mode is changed, so it is necessary to initialize the stack pointer of the mode used in the program with the disable interrupt state.

.

How to change the processor mode

You can change the processor mode by setting MODE[4:0] (0 to 4 bits) in cpsr.

A field setting is provided to light a specific field in cpsr.

How to initialize the stack pointer

The stack pointer r13 is automatically switched when the processor mode is changed, so the address of the stack pointer must be reserved on an 8-byte boundary and initialized in the supervisor (SVC) mode, interrupt prohibition state.

To initialize the stack, use the following procedure

1. By the MSR instruction, the cpsr_c field is specified, and MODE[4:0] of cpsr (current program status register) is rewritten.
2. Initialize the stack pointer with the LDR pseudo instruction.

MSR    CPSR_c,<IRQ/FIQ interrupt prohibition + processor mode setting value> 
LDR SP,=<Stack address>

【sample program】

Mode_USR  EQU 0x10   ; CPSR.mode[4:0]User mode setting
Mode_FIQ EQU 0x11 ; CPSR.mode[4:0]FIQ mode setting value
Mode_IRQ EQU 0x12 ; CPSR.mode[4:0]IRQ mode setting
Mode_SVC EQU 0x13 ; CPSR.mode[4:0] supervisor mode setting
Mode_ABT EQU 0x17 ; CPSR.mode[4:0]Abort mode setting
Mode_UND EQU 0x1B ; CPSR.mode[4:0] undefined mode setting
Mode_SYS EQU 0x1F ; CPSR.mode[4:0] system mode setting value

I_Bit EQU 0x80 ; IRQ bit definition
F_Bit EQU 0x40 ; FIQ bit definition

    MSR CPSR_c,#Mode_IRQ:OR:I_Bit:OR:F_Bit ; Change to IRQ mode
    LDR SP,=<IRQ_STACK_TOP> ; Initialize IRQ mode stack.

    MSR CPSR_c,#Mode_FIQ:OR:I_Bit:OR:F_Bit ; Change to FIQ mode
    LDR SP,= <IRQ_STACK_TOP> ; Initialize FIQ mode stack.

    MSR CPSR_c,#Mode_UND:OR:I_Bit:OR:F_Bit ; Change to undefined mode
    LDR SP,= <UND_STACK_TOP> ; Initialize the undefined mode stack.

    MSR CPSR_c,#Mode_ABT:OR:I_Bit:OR:F_Bit ; Change to abort mode
    LDR SP,= <ABT_STACK_TOP> ; Initialize the abort mode stack.

    MSR CPSR_c,#Mode_SVC:OR:I_Bit:OR:F_Bit ; Change to supervisor mode
    LDR SP,= <SVC_STACK_TOP> ; Initialize the supervisor mode stack

    MSR CPSR_c,#Mode_SYS:OR:I_Bit:OR:F_Bit ; Change to system mode
    LDR SP,= <SYS_STACK_TOP> ; Initialize the system mode stack

How to define a stack address

Target memory placement settings (such as ROM/RAM settings) are generally made in the linker’s settings. Although it is possible to set them individually in the program, when changing the memory allocation, multiple files must be modified, and defects may occur due to missing modifications.

For Arm compiler, you can check the address setting values set in the scatter loading file in the assembly language or C/C++ language by the method called scatter loading.
In the case of assembly language, the following (<Name> is the name of the region set in the scatter loading file) can be used to check the address setting.

“||Image$$<Name>$$ZI$$Limit||”

For more information, please refer to Arm Compiler Armlink User Guide.

Example scatter loading file

In the scatter loading file, starting at 0x80000000, the various stacks allocate space in 16K bytes.

USR_STACK 0x80000000 ALIGN 8 EMPTY 0x4000 ; Allocate user/system mode stack.
{
}
IRQ_STACK +0 ALIGN 8 EMPTY 0x4000 ; Allocate IRQ stack
{
}
FIQ_STACK +0 ALIGN 8 EMPTY 0x4000 ; Securing the FIQ mode stack
{
}
UND_STACK +0 ALIGN 8 EMPTY 0x4000 ; Allocate an undefined mode stack
{
}
ABT_STACK +0 ALIGN 8 EMPTY 0x4000 ; Secure abort mode stack
{
}
SVC_STACK +0 ALIGN 8 EMPTY 0x4000 ; Secure supervisor mode stack
{
}

Example of an assembly source file

Refers to the address setting in the scatter loading file.

;
; Refer to the stack address from the scatter loading file.
;
  IMPORT ||Image$$USR_STACK$$ZI$$$Limit|| ; User mode stack address.
  IMPORT ||Image$$IRQ_STACK$$ZI$$$Limit||| ; IRQ mode stack address
  IMPORT ||Image$$FIQ_STACK$$ZI$$$Limit||| ; FIQ mode stack address
  IMPORT ||Image$$UND_STACK$$ZI$$$Limit||| ; Undefined mode stack address
  IMPORT ||Image$$ABT_STACK$$ZI$$$Limit||| ; Abort mode stack address
  IMPORT ||Image$$SVC_STACK$$ZI$$$Limit||| ; Supervisor Mode Stack Address
...
…
  MSR CPSR_c,#Mode_IRQ:OR:I_Bit:OR:F_Bit ; Change to IRQ mode
  LDR SP,= ||Image$$IRQ_STACK$$ZI$$$Limit|| Initialize the IRQ mode mode mode stack

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